What is VIH / VIL / VOH / VOL?

VIH = voltage input high — the minimum voltage needed at the input to be considered logic HIGH (1)

VIL = voltage input low — the maximum voltage needed at the input to be considered logic LOW (1)

Conversely…

VOH = voltage output high — the logic HIGH output voltage from a driver - usually specified at a set loading current IOH (output high current)

VOL = voltage output low — the logic LOW output voltage from a driver - usually specified at a set loading current IOL (output low current)

Let’s look at an example for a 5 V logic level.

5V logic scale

5 V Logic

We can visualize VIH and VIL as a percentage of the bar. For example, in the I2C protocol, the VIL = 30% of VCC, and the VIH = 70% of VCC.

VIL = 0.3 x 5 V = 1.5 V

VIH = 0.7 x 5 V = 3.5 V

i2c-logic-level-example

VIH = 3.5 V, any voltage between 3.5 V and 5 V is considered a logic high input voltage

VIL = 1.5 V, any voltage between 1.5 V and 0 V is considered a logic low input voltage

Voltages between VIH and VIL are considered indeterminate. The voltage input could be high or low without any certainty.

The indeterminate state exists between a VIH and VIL. As already described, a voltage that is between 3.5 V and 1.5 V cannot be determined to be a HIGH or LOW logic level output. Let’s look at an open-drain driver for reference.

open-drain-driver-example

Open-drain driver example

An open-drain driver pulls LOW through a n-channel MOSFET. For this example, lets assume an absurd resistance of 10 kΩ for the drain-to-source resistance of the FET.

In this specific case, a 10 kΩ pull-up resistor is used. This makes the math easy, as the voltage at the low output of the open-drain driver is simply half the supply voltage VCC since this resistive divider has R1 = R2 = 10 kΩ = 10 kΩ. VOL = 2.5 V.

This is an issue. VOL = 2.5 V lands in the indeterminate region. The nFET’s output LOW capability lands in the indeterminate region of operation. This indicates that either a stronger pull-down driver needs to be used, or a weaker pull-up resistor needs to be used instead of 10 kΩ. If we continue using the setup above, we can never output a low logic with certainty due to these reasons.

To fix the issue, lets use a more realistic pull-down driver that has a much smaller drain-to-source resistance of say 100 ohms.

appropriate pull down driver resistance

Using a stronger pull-down driver

This case easily meets a proper VOL. The output low voltage is just 0.05 V or 50 mV when the nFET pulls LOW. This is well below a VIL = 1.5 V, so we know that this driver is within spec. It will output a low with certainty.

Because open-drain drivers cannot drive a logic HIGH, they technically do not have a VOH spec. However, since open-drain systems require a pull-up resistor, our 10 kΩ pull-up resistor will pull the voltage output to VCC, making our VOH = VCC = 5 V.

Voltage Output High

Voltage Output High is through the pull-up resistor to VCC. The pull-up resistor charges the capacitance “C” to 5 V through the resistance “R” when the open-drain driver (nFET) is turned OFF.

For more understanding on what an open-drain circuit is, please see this blog post on open-drain circuit topology.

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